As shown in FIG. 1, it has become usual that a Digital Video Signal Source 10, such as set-top box or personal computer, receives multimedia data via a communication line and provides processed digital video data (external data) and clock (external clock) to a Digital Video Monitor 12, such as a liquid crystal display (LCD), to display a video image. In such an arrangement, digital audio data is usually embedded in the digital video data. Monitor 12 has a Clock Recovery unit (CRU) 14 that receives the external clock signal from the Digital Video Signal Source 10 and recovers a clock for use by Monitor 12. The recovered clock signal is used for processing the video and audio signals in Monitor 12. Clock Recovery unit 14 may be a phase lock loop circuit (PLL) as shown in FIG. 2. Phase Lock Loop circuit 14 has a Phase Comparator 16, a Loop Filter 18 and a Voltage Controlled Oscillator (VCO) 20. Phase Comparator 16 compares the phases of the external clock from the Digital Video Signal Source 10 and the recovered clock. Loop Filter 18 receives the output signal of Phase Comparator 16 and controls the oscillation frequency of Voltage Controlled Oscillator 20. Therefore, Clock Recovery unit 14 generates the recovered clock signal exhibiting a phase synchronized with the external clock signal. Since Clock Recovery unit 14 includes Loop Filter 18, it considerably reduces jitter in the recovered clock signal even if the external clock signal exhibits jitter.
There are some measurements that indicate whether the interface between Digital Video Signal Source 10 and Digital Video Monitor 12 is good. One of these measurements is jitter of the clock and/or video data signals from Digital Video Signal Source 10 relative to the recovered clock signal generated in Clock Recovery unit 14.
For the measurement of the above jitter, the recovered clock signal may be acquired at the output of Clock Recovery unit 14. However, this measurement requires a technician to remove the cover of Monitor 12 and to use a probe, etc., which is a somewhat troublesome procedure risks damaging Monitor 12 because of the possibility of misconnection of the probe, or other such error. Besides, this procedure can measure only the interface characteristic of Digital Video Signal Source 10 relative to the individual Digital Video Monitor 12 being tested at the time.
Another method of jitter measurement is to provide another Clock Recovery unit in addition to the Clock Recovery unit already present in Monitor 12 to generate another recovered clock to measure the jitter in the external clock and in the external video data. However, even if the Clock Recovery unit is an IC, it is still hardware, so that there will be an individual difference depending on manufacturing lots, etc. Therefore, one cannot realize an additional hardware reference Clock Recovery unit without adding another cause of variation.
In view of the described individual differences in hardware clock recovery units, it is known to realize an ideal Clock Recovery unit by software. FIG. 3 shows an example of a system employing such a software clock recovery unit. Digital Video Signal Source 10 provides the external clock and digital video data (external data) to a Digital Storage Oscilloscope 22. FIG. 4 shows a schematic block diagram of Digital Storage Oscilloscope 22. Buffer circuits 24 and 26 receive the external clock and external data signals of Digital Video Signal Source 10 and analog-to-digital converters (ADCs) 28 and 30 digitize the outputs of Buffer Circuits 24 and 26, respectively. Fast Acquisition Memories 32 and 34 store the outputs of the ADCs 28 and 30. The Acquisition Memories 32 and 34 are coupled to a Bus 36. Processing Memory 38, Microprocessor 40, Program Memory 42, User Interface 44 and Display 46 are also coupled to the Bus 36. The external clock and external data stored in Acquisition Memories 32 and 34 are transferred to Processing Memory 38, and processed by Microprocessor 40 according to a program stored in the Program Memory 42, and then the result is displayed on the Display 46. User Interface 44 is used to set-up the operations of the input signal acquisition, data processing, etc.
The conventional Digital Storage Oscilloscope 22 stores software in its program memory 42 to simulate the operation of Clock Recovery unit 14, including a Phase Lock Loop circuit (PLL). Then, Microprocessor 40 processes the acquired external clock according to the PLL simulation software to generate a jitter-reduced clock that is equivalent to the recovered clock by adjusting the timing of the external clock. Microprocessor 40 compares the timing data of the recovered clock generated in the simulation and the timing data of the non-processed external clock acquired by the blocks 24, 28 and 32 according to the program stored in Program Memory 42 so that it measures the jitter of the external clock signal relative to the recovered clock signal. Similarly, Microprocessor 40 compares the timing data of the recovered clock signal generated in the simulation with the timing data of the non-processed external data signal acquired by the blocks 26, 30 and 34 according to the program stored in the Program Memory 42 so that it measures the jitter of the external data relative to the recovered clock. These measurement results are displayed on Display 46 as a histogram, a table, an eye pattern, etc.
Clock generation by the above software makes it possible to generate an ideal recovered clock independent of the hardware of the Clock Recovery unit. However, Acquisition Memories 32 and 34 store too many data samples to efficiently process in a reasonable time. That is, it takes a large amount of time to simulate operation of the phase lock loop over all the samples of the acquired external clock, which impedes quick measurement. Besides, known simulation software is large and difficult to use.
In the prior art, it has been described how to measure jitter of the clock and video data signals of a digital video source, such as set-top box or personal computer, relative to a recovered clock. Such an arrangement is also similar to that used to measure the jitter of data communication signals relative to the recovered clock.
U.S. Pat. No. 6,598,004 (Ishida et al.) corresponding to Japanese patent publication No. 2002-107392 discloses a jitter measurement method using a digital oscilloscope and an interpolation method that interpolates data around a zero-crossing from measured data of a signal under test to estimate timing of zero-crossings. Then, jitter is measured based on the estimated zero-crossings. Further, Japanese patent publication No. 2002-198802 discloses a jitter measurement of a phase lock loop using a digital oscilloscope as a jitter measurement apparatus. However, these references do not resolve the individual difference problem noted above.
Because of the described reasons, it is preferable to realize an ideal Clock Recovery unit by software employing an uncomplicated algorithm, and it would be better if the software requires few calculations. Further, it is preferable to measure the jitter of the external clock and the external data relative to the recovered clock recovered by the software.
Therefore, what is desired is to provide a clock recovery method that can simulate a recovered clock from an acquired external clock by an uncomplicated algorithm with few calculations. What is further desired is to provide a method for measuring jitter of an external clock relative to a recovered clock that is simulated from an acquired external clock by an uncomplicated algorithm with few calculations.